本文将报道一种FET DRAM电路的发展——共用字线(SWL)DRAM单元。这种单元的组装密度在相同的光刻程序中超过常规1-DRAM单元(见图1和图2)。虽然图SWL RAM单元面积才是7个L~2,其L为平均器件尺寸,它为位线和读出放大器提供间距大于6个L。这是可能的,因为沿着 This article reports the development of a FET DRAM circuit - a common word line (SWL) DRAM cell. The assembly density of such cells exceeds that of conventional 1-DRAM cells in the same lithography process (see FIGS. 1 and 2). Although the figure SWL RAM cell area is only 7 L ~ 2, L is the average device size, which provides more than 6 L spacing for bit lines and sense amplifiers. This is possible because along