在相位相干接收机中,经常用锁相环作为跟踪环,而此锁相环的电路结构型式不同于文献[1]所讨论和分析的标准模型(图1)。这样就产生了各种锁相环的性能等效问题。首先研究图2所示的跟踪环方框图[2]。为简单起见,在比较中忽略限幅器抑制的影响。如果外部参考源在频率ω_c—ω_1上是没有噪声的, In phase coherent receivers, the PLL is often used as the tracking loop. The circuit structure of the PLL is different from the standard model discussed and analyzed in [1] (Fig. 1). This produces a variety of phase-locked loop performance equivalent problem. The first study of the tracking ring shown in Figure 2 Block Diagram [2]. For simplicity, the effect of limiter rejection is ignored in the comparison. If the external reference source is noiseless at frequency ω_c-ω_1,