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本篇论文从横向PNP二维近似模型出发,分析和研究影响电流增益h_(FE)的主要因素.在此基础上,设计一块芯片上有几种不同几何形状和尺寸的横向PNP管图形.采用常规集成电路工艺制出BVceo=40V,BVebo=100V,Veb=0.5V(Ic=100μA),h_(FE)=100的横向PNP晶体管.测量结果表明,理论上的估计与实验结果一致.我们发现:设计创造h_(FE)=100并不十分难.关键是如何减少纵向注入和基区复合以及如何提高集电极电流Ic成份.我们认为:设计合理的埋层间隙;合理的横向基区厚度及纵向基区厚度;减少发射区引线孔的几何尺寸是提高h_(FE)的重要途径.本文还介绍几种减少纵向注入的结构和减少复合的手段.
Based on the two-dimensional transverse PNP model, this paper analyzes and studies the main factors that affect the current gain h FE. On this basis, we design a lateral PNP tube with different geometries and sizes on a chip. The conventional integrated circuit process produces a lateral PNP transistor with BVceo = 40V, BVebo = 100V, Veb = 0.5V (Ic = 100μA) and h FE = 100. The measurement results show that the theoretical estimation is consistent with the experimental results. : It is not difficult to create h FE = 100. The key is how to reduce the vertical injection and base recombination and how to improve the collector current Ic composition.We think that the designed buried gap, the reasonable lateral base thickness and The vertical thickness of the base region.It is an important way to improve the h_ (FE) to reduce the geometrical dimension of the lead hole in the emitter.We also introduce several structures to reduce the longitudinal injection and reduce the composite.