论文部分内容阅读
In a time-interleaved analog-to-digital converter(TI ADC), several individual ADCs operate in parallel to achieve a higher sampling rate. Low power consumption as well as good linearity can be obtained by applying successive approximation register(SAR) converters as sub-channel ADCs. In spite of the advantages, this structure suffers from three mismatches, which are offset mismatch, gain mismatch, and time skew. This paper focuses on a TI SAR ADC with a number of channels. The mismatch effects in the frequency domain are analyzed and the derived close form formulas are verified based on Matlab. In addition, we clarify that the standard deviation of DNL and INL of an M-channel TI ADC is reduced by a factor of M~(1/2) compared to a single channel ADC. The formulas can be used to derive the corresponding requirements when designing a TI ADC. Our analysis process is able to inform the study of calibration algorithms.
Several ADCs operate in parallel to achieve a higher sampling rate. Low power consumption as well as good linearity can be acquired by approximation register (SAR) converters as sub-channel ADCs. In spite of the advantages, this structure suffers from three mismatches, which are offset mismatch, gain mismatch, and time skew. This paper focuses on a TI SAR ADC with a number of channels. The mismatch effects in the frequency The domains are analyzed and the derived close form formulas are verified based on Matlab. In addition, we clarify that the standard deviation of DNL and INL of an M-channel TI ADC is reduced by a factor of M ~ (1/2) compared to a single channel ADC. The formulas can be used to derive the corresponding requirements when designing a TI ADC. Our analysis process is able to inform the study of calibration algorithms.