已经规定了抗辐照CMOS电路的工艺技术。就SiO_2栅绝缘体而言,对抗辐照工艺参数已经最佳化了。用掺金硅衬底减少载流子寿命来防止由于寄生p-n-p-n结构引起的电流闩锁。估计了采用加固工艺的器件成品率,并用偏压温度寿命试 Already prescribed anti-radiation CMOS circuit technology. In the case of SiO 2 gate insulators, the anti-irradiation process parameters have been optimized. The use of a gold-doped silicon substrate reduces the lifetime of the carriers to prevent current latch-up due to the parasitic p-n-p-n structure. The yield of the device using the reinforcement process is estimated and the bias temperature life test is used