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本文介绍采用CMOS门阵列技术实现的、用于容错存储体的两种纠错编码电路(奇权纠错编码电路及多位纠错编码电路)的设计与实现。这两种电路均已研制成功并已通过部级鉴定。
This paper introduces the design and implementation of two kinds of error correction coding circuits (odd weight error correction coding circuit and multi-bit error correction coding circuit) implemented by using CMOS gate array technology. Both circuits have been successfully developed and have passed ministry-level certification.