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准确计算组合逻辑电路的延迟时间对电路的性能评估与优化设计十分重要。本文分析组合逻辑电路的函数功能与通路延迟时间计算的关系，提出通路延迟时间的计算方法。该方法排除了伪路径（ＦａｌｓｅＰａｔｈ）及不可见路径（ＩｎｖｉｓｉｂｌｅＰａｔｈ）对延迟时间计算的影响，用Ｃ语言在ＳｕｎＳＰＡＲＣⅡ上实现的算法表明：通路延迟时间的分析、计算结果比文献［１］、［３］介绍的方法更接近于实际结果，实验结果表明：该方法计算速度快，能适应大规模电路的延迟时间分析与计算。
Accurately calculate the delay time of the combinational logic circuit is very important for the performance evaluation and optimization of the circuit. This paper analyzes the relationship between the function of the combinational logic circuit and the calculation of the path delay time, and proposes the calculation method of the path delay time. This method excludes the effect of FalsePath and InvisiblePath on the calculation of delay time. The algorithm implemented in SunSPARCⅡin C language shows that the analysis of the delay time of the path is more accurate than that in [1], [3] ] Is closer to the actual results. The experimental results show that the proposed method is fast and can be used to analyze and calculate the delay time of large-scale circuits.