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针对双模卫星导航接收系统对集成度、功耗和面积的需求,研究了频率综合器的电路结构和频率规划,分析了频率综合器环路的参数设计,实现了片上集成环路滤波器,版图采用MIM和MOS电容堆叠的方式节省了面积,电容电阻采用了加权的方式,使环路带宽可调。采用高速TSPC结构的D触发器构成双模预分频器,降低了整体电路的功耗。利用基于0.18μm RF CMOS工艺实现了低功耗全集成的频率综合器,芯片面积0.88 mm2,功耗18.5 m W,相位噪声-94 d Bc/Hz@100 k Hz,杂散-68 d Bc。测试结果证明了该电路系统参数设计和结构改进是合理和有效的,各参数性能满足系统要求。
Aiming at the demand of integration, power consumption and area of dual-mode satellite navigation receiving system, the circuit structure and frequency planning of frequency synthesizer are studied. The parameter design of frequency synthesizer loop is analyzed, and the integrated loop filter, The layout uses MIM and MOS capacitor stacks to save area, and the capacitor resistors are weighted to make the loop bandwidth adjustable. The use of high-speed TSPC structure of the D flip-flop dual-mode prescaler to reduce the overall power consumption of the circuit. A low-power, fully integrated frequency synthesizer based on a 0.18μm RF CMOS process is implemented with a chip area of 0.88 mm2, power dissipation of 18.5 mW, phase noise of -94 dBc / Hz at 100 kHz, and spurious -68 dBc. The test result proves that the circuit system parameter design and structure improvement are reasonable and effective, and the performance of each parameter meets the system requirements.