A low-power frequency synthesizer for GPS/Galileo L1/E1 band receivers implemented in a 0.18μm CMOS process is introduced.By adding clock-controlled transistors at latch outputs to reduce the time constant at sensing time,the working frequency of the high-speed source-coupled logic prescaler supplying quadrature local oscillator signals has been increased,compared with traditional prescalers.Measurement results show that this synthesizer achieves an in-band phase noise of-87 dBc/Hz at 15 kHz offset,with spurs less than-65 dBc.The whole synthesizer consumes 6 mA in the case of a 1.8 V supply,and its core area is 0.6 mm~2. A low-power frequency synthesizer for GPS / Galileo L1 / E1 band receiver implemented in a 0.18 μm CMOS process was introduced. By adding clock-controlled transistors at latch outputs to reduce the time constant at sensing time, the working frequency of the high- speed source-coupled logic prescaler supplying quadrature local oscillator signals has been increased, compared with traditional prescalers. Measurement results show this this synthesizer achieves an in-band phase noise of -87 dBc / Hz at 15 kHz offset, with spurs less than-65 dBc.The whole synthesizer consumes 6 mA in the case of a 1.8 V supply, and its core area is 0.6 mm ~ 2.