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本文详细地分析了高温退火后在二硅化钼/薄n~+多晶硅(<1000A)栅结构中栅氧化层介电强度退化的情况。同时分析了栅氧化层绝缘特性和多晶硅中磷浓度、多晶硅原生氧化物,二硅化钼薄层电阻等各方面因素之间的关系,给出了二硅化钼、多晶硅、栅氧化物结构扫描电子显微镜、透射电子显微镜的观测结果。通过分析得出下列结论:高温退火时,在有阻挡层存在的情况下(阻挡层指二硅化钼淀积之前所形成的多硅上原生的厚氧化物),多晶硅与硅化钼局部作用会透过薄多晶硅层造成栅氧化物的损坏。根据分析结果,我们研究了一种没有介电强度退化的Mosi_2/薄Poly—si栅工艺。该工艺将二硅化钼直接淀积到未掺杂多晶硅上,从而控制多晶硅原生氧化物的生长,然后再将磷注入到二硅化钼中。这种工艺提供了很好的栅氧化层介电强度(薄到500A的多晶硅栅器件也是如此),易干法腐蚀,不产生多晶硅钻蚀,器件特性稳定,比通常的多晶硅栅工艺可靠性好。
In this paper, the degradation of dielectric strength of the gate oxide in the molybdenum disilicide / thin n ~ + polysilicon (<1000A) gate structure after high temperature annealing has been analyzed in detail. At the same time, the relationship between the insulation properties of gate oxide and phosphorus concentration in polysilicon, native oxide of polysilicon and the sheet resistance of molybdenum disilicide is also analyzed. The structure of molybdenum disilicide, polysilicon, gate oxide structure scanning electron microscope , Transmission electron microscopy observations. The following conclusions can be drawn from the analysis: At high temperature annealing, in the presence of a barrier layer (barrier means the native thick oxide on the polysilicon formed prior to the deposition of molybdenum disilicide), the local effects of polysilicon and molybdenum silicide are transparent Thin gate polysilicon layer damage caused by the gate oxide. Based on the results of the analysis, we investigated a Mosi_2 / thin Poly-Si gate process without degradation of dielectric strength. The process directly deposits molybdenum disilicide onto the undoped polysilicon to control the growth of the polysilicon native oxide, which is then injected into the molybdenum disilicide. This process provides good gate oxide dielectric strength (as is the case with polysilicon gate devices up to 500A), easy dry-etching, no polysilicon etch down, stable device characteristics and reliability over typical polysilicon gate processes .