Altera的LogicLock递增设计法主持APEXⅡ系列基于Quartus Ⅱ开发软件环境的LogicLock递增设计方法,不仅可以优化任何架构的设计,而且可以改善集成IP内核设计的流程,或通过采用基于团队的方法大幅度加速SOPC(可编程片上系统)的开发周期。 Altera专有的LogicLock递增设计法是可支持APEX Ⅱ可编程逻 Altera’s LogicLock Incremental Design Approach Hosted the APEX II family of LogicLock incremental design methods based on the Quartus II development software environment to optimize not only the design of any architecture but also the process of integrating IP core design or greatly accelerate SOPC by adopting a team-based approach (Programmable System on Chip) development cycle. Altera’s proprietary LogicLock incremental design method is available to support APEX II programmable logic