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基于过采样和Δ调制的原理,设计并且实现了一种高精度、低功耗的11位采样跟踪型SAR A/D转换器。采用过采样并对传统的SAR ADC在量化方式上进行了改进,降低了ADC的量化噪声和微分非线性(DNL),提高了分辨率。芯片采用TSMC 0.13μm CMOS工艺进行流片,核心面积为0.135mm×0.144mm。后仿真结果表明,在0.6V供电电压,过采样率(OSR)为4,带宽和采样频率分别为5 MHz和40 MS/s的条件下,ADC的信噪失真比(SNDR)为68.5dB,整体功耗为1mW,FOM为12.2fJ/conv。
Based on the principle of oversampling and delta modulation, a high-precision, low-power, 11-bit sample-tracking SAR A / D converter is designed and implemented. Oversampling and quantization of traditional SAR ADCs have been improved to reduce the ADC’s quantization noise and differential non-linearity (DNL) and improve the resolution. The chip is TSMC 0.13μm CMOS process flow sheet, the core area of 0.135mm × 0.144mm. The post-simulation results show that the signal-to-noise (SNR) distortion ratio (SNDR) of the ADC is 68.5dB under the conditions of 0.6V supply voltage, an oversampling rate (OSR) of 4, bandwidth and sampling frequency of 5 MHz and 40 MS / Overall power consumption is 1mW, FOM is 12.2fJ / conv.