论文部分内容阅读
3.主位片主位片包括门阵列和逻辑阵列两大类,本文仅以门阵列的设计为例.门阵列是由一些采用同样加工方法制造的基本门集成在硅晶片上的一个阵列,如图3.31所示.芯片中央分布着单元阵列,在单元之间有相应的连线,第一金属层沿着纵向设置布线通路,第二金属层沿着横向设置布线通路.目前已发展为三层,第三层安排电源或芯片I/O接头.各层的金属是铝铜合金,层间隔离是二氧化硅.
3. The main tablet The main tablet includes the gate array and the logic array in two categories, this article only to the gate array design as an example.Gate array is made by using some of the same basic gate manufacturing integrated in an array on the silicon wafer, As shown in Figure 3.31. The chip is centrally distributed array of cells, there is a corresponding connection between the cells, the first metal layer is arranged along the longitudinal direction of the wiring path, the second metal layer is arranged along the horizontal wiring path has now developed into three Layer, the third layer of power supply or chip I / O connector.The layers of metal is aluminum-copper alloy, the interlayer isolation is silicon dioxide.