论文部分内容阅读
文章讨论了基于VERILOG验证平台的功能、组成、关键设计技术及优化几个方面的问题,并在此基础上用VERILOGHDL建立了高效的自检查验证平台,实现了被测模型的输出与期望输出的自动比较。
The article discusses the functions, components, key design techniques and optimization problems based on VERILOG verification platform. On this basis, VERILOGHDL establishes an efficient self-checking verification platform to realize the output of the tested model and the expected output Automatic comparison.