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本文对硅晶体管制造中当硅片经过杂质予沉积和热氧化再分布中产生杂质分凝后的扩散层薄层电阻进行了计算。给出了与实验数据符合得较好的理论表达式。并根据晶体管设计中对于扩散结深、扩散层薄层电阻以及氧化膜厚度的要求,讨论了扩散工艺条件的制订等问题。
In this paper, we calculate the sheet resistance of the diffusion layer after the silicon wafer is deposited by impurities and thermal oxidation redistribution in the manufacture of silicon transistors. The theoretical expression that is in good agreement with the experimental data is given. According to the requirements of the transistor design for the diffusion junction depth, the sheet resistance of the diffusion layer and the thickness of the oxide film, the formulation of the diffusion process conditions is discussed.