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A novel low power RF receiver front-end for 3-5 GHz UWB is presented.Designed in the 0.13 μm CMOS process,the direct conversion receiver features a wideband balun-coupled noise cancelling transconductance input stage,followed by quadrature passive mixers and transimpedance loading amplifiers.Measurement results show that the receiver achieves an input return loss below -8.5 dB across the 3.1-4.7 GHz frequency range,max-imum voltage conversion gain of 27 dB,minimum noise figure of 4 dB,IIP3 of -11.5 dBm,and IIP2 of 33 dBm.Working under 1.2 V supply voltage,the receiver consumes total current of 18 mA including 10 mA by on-chip quadrature LO signal generation and buffer circuits.The chip area with pads is 1.1 × 1.5 mm2.
A novel low power RF receiver front-end for 3-5 GHz UWB is presented. Design in the 0.13 μm CMOS process, the direct conversion receiver features a wideband balun-coupled noise canceling transconductance input stage, followed by quadrature passive mixers and transimpedance loading amplifiers.Measurement results show that the receiver achieves an input return loss below -8.5 dB across the 3.1-4.7 GHz frequency range, max-imum voltage conversion gain of 27 dB, minimum noise figure of 4 dB, IIP3 of -11.5 dBm, and IIP2 of 33 dBm. Working under 1.2 V supply voltage, the receiver consumes total current of 18 mA including 10 mA by on-chip quadrature LO signal generation and buffer circuits. The chip area with pads is 1.1 × 1.5 mm2.