超大规模集成电路产品(如EEPROM、高密度DRAM和高性能CMOS电路等)由于其几何尺寸小、结浅,需要非常薄的高质量5～25nm二氧化硅薄膜。但是,在制备这些器件的工艺过程中,相互矛盾的工艺要求限制了常规炉子的使用范围。1.由于沟道过量的掺杂剂再分布,所以在炉中难以控制阈值调整。高质量的氧化膜需要高温处理,然 VLSI products, such as EEPROMs, high-density DRAMs, and high-performance CMOS circuits, require very thin, high-quality 5-25nm silicon dioxide films due to their small geometries and shallow junction. However, conflicting process requirements limit the range of use of conventional furnaces in the process of preparing these devices. 1. It is difficult to control the threshold adjustment in the furnace due to the redistribution of excess dopant in the channel. High-quality oxide film needs high temperature treatment, however