论文部分内容阅读
A novel current-mode voltage reference circuit which is capable of generating sub-1 V output voltage is presented.The proposed architecture exhibits the inherent curvature compensation ability.The curvature compensation is achieved by utilizing the non-linear behavior of gate coupling coefficient to compensate non-linear temperature dependence of base-emitter voltage.We have also utilized the developments in CMOS process to reduce power and area consumption.The proposed voltage reference is analyzed theoretically and compared with other existing methods.The circuit is designed and simulated in 180 nm mixed-mode CMOS UMC technology which gives a reference level of 246 mV.The minimum required supply voltage is 1 V with maximum current drawn of 9.24 μA.A temperature coefficient of 9 ppm/℃ is achieved over —25 to 125 ℃ temperature range.The reference voltage varies by ±11 mV across process corners.The reference circuit shows the line sensitivity of0.9 mV/V with area consumption of 100 × 110 μm~2
A novel current-mode voltage reference circuit which is capable of generating sub-1 V output voltage is presented. The proposed architecture exhibits the inherent curvature compensation ability. Curvature compensation is achieved by utilizing the non-linear behavior of gate coupling coefficient to compensate non-linear temperature dependence of base-emitter voltage. We have also utilized the developments in CMOS process to reduce power and area consumption. proposed voltage reference is analyzed theoretically and compared with other existing methods. The circuit is designed and simulated in 180 nm mixed-mode CMOS UMC technology which gives a reference level of 246 mV. The minimum required supply voltage is 1 V with maximum current drawn of 9.24 μA. A temperature coefficient of 9 ppm / ° C is achieved over -25 to 125 ° C temperature range. The reference voltage varies by ± 11 mV across the process corners. The reference circuit shows the line sensitivity of 0.9 mV / V with area consumption of 100 × 110 μm ~ 2