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该文讨论了利用Ｓ５９２０和ＰＬＤ实现ＴＭ３２０Ｃ３２与ＰＣＩ总线间数据传输，以及用协处理器完成ＤＶＤ流合成的具体方案；结合设计给出了 ＭＡＸ＋ＰＬＵＳⅡ软件中 ＦＩＦＯ模块的使用和操作时序。针对 ＤＶＢ传输流形成，讨论了在复杂时序逻辑设计中，使用同步触发和２倍输入时钟方式消除毛利的产生，结果表明这种方法是很有效的。
This article discusses the use of S5920 and PLD TM320C32 and PCI bus to achieve data transfer between the bus and the completion of the use of co-processor DVD stream synthesis program; with MAX + PLUS Ⅱ design gives the FIFO module in the use and timing. In view of the formation of DVB transport stream, it is discussed that the use of synchronous triggering and 2 times input clock to eliminate the generation of margins in complex timing logic design shows that this method is very effective.