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本文对高速电流开关线路作了分析,给出直流设计准则及实验结果。提出了一些改进的线路。这些改进线路大大地降低了对元件和电源电压的严格容差要求,此外还减少了元件数量和电源电压种类。对单一型晶体管和互补型晶体管电流开关线路进行了直流分析。讨论了各种类型线路的设计公式和驱动倍数。详细地研究了电流开关线路的瞬态过程。结果指出:限制每级最小延迟的因素是射基电容以及输入上升时间,晶体管的固有频率响应。对于由电流开关作成的半加器线路和发生器线路作了介绍。
This paper analyzes the high-speed current switch circuit, gives the DC design criteria and experimental results. Proposed some improved lines. These improved circuits greatly reduce the stringent tolerance requirements on components and supply voltages, as well as reducing the number of components and types of supply voltages. DC analysis of single and complementary transistor current switching circuits. Discussed the design of various types of lines and drive multiples. The transient process of the current switching circuit is studied in detail. The results indicate that the factors that limit the minimum delay at each stage are the emitter capacitance and the input rise time, the natural frequency response of the transistor. Introduced by the half-adder circuit and the generator circuit made by the current switch.