人们在考虑可编程序逻辑阵列(以下简称PLA)的测试及自校验的设计时,必须分别考虑固定型故障、交叉点故障、短路故障等几种故障模型。本文给出一个统一的故障模型,并指出,只要考虑单一和多重交叉点故障就自然包括考虑了固定型单故障及除输出线短路之外的短路单故障,最后,对于该故障模型所作的若干假定的合理性与必要性进行了讨论。 When considering the design of programmable logic array (hereinafter referred to as PLA) testing and self-checking, several fault models, such as fixed faults, intersection faults and short-circuit faults, must be considered respectively. In this paper, we present a unified fault model and point out that it is natural to consider single and multiple faults as long as single and multiple short-circuit faults are taken into account. Finally, The rationality and necessity of the hypotheses are discussed.