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近年来,SoC设计规模和复杂度的不断提升使得基于IP核的设计和验证技术成为研究的热点.基于断言的功能验证具有代码简洁、可以快速定位设计缺陷以及易于与设计绑定等优点,在IP核功能验证中受到了广泛的关注.本文研究基于断言的Compact PCI总线控制器核的功能验证问题,提出一种基于断言的监视器组件设计方法,将Compact PCI核接口信号时序的断言、覆盖率统计的断言封装为监视器组件,以提高验证环境的开发效率和可复用性.实际应用表明,本方法在加快验证过程收敛速度的同时,随IP核一起发布的验证组件提高了验证环境的可复用性.
In recent years, the design scale and complexity of SoC have been increasing, making IP core-based design and verification technology a hot research topic.Assertive-based functional verification has the advantages of concise code, quick design of design flaws and easy design binding, IP core function verification has been widely concerned.This paper studies assertive Compact PCI bus controller core function verification problem, proposes a assertion-based monitor component design method, the Compact PCI core interface signal timing assertion, coverage Rate assertion package as a monitor component to improve the development efficiency and reusability of the verification environment.The practical application shows that this method not only speeds up the convergence of the verification process but also improves the verification environment Reusability.