Most embedded systems present a number of software vulnerabilities, such as buffer overflow, while the physical attacks are becoming popular as well.This paper presents a series of novel architectural-enhanced security solutions.The automated compiler extracts the intrusion model for intrusion detection and secure tag of each main memory segment at the compile time automatically.At runtime, the designed hardware observes its dynamic execution trace and checks whether the trace conforms to the permissible behavior and trigger appropriate response mechanisms.The proposed schemes dont change the compiler or the existing instruction set and imposes no restriction to the software developer.The architectural design is implemented on an actual OR1200-FPGA platform.The experimental analysis shows that the proposed techniques can eliminate a wide range of common software and physical attacks with low performance penalties and minimal overheads.