用于三维堆叠芯片的通用网络服务片设计

来源 :系统仿真学报 | 被引量 : 0次 | 上传用户:tltim2009
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在三维集成技术中,让制造检测好的已知合格片在不同的三维芯片设计中复用可有效降低成本。设计了一种采用通用网络服务片(GNSD)来构建三维片上网络的通用网络(GNet),并以一个64核处理器为实验对象,分别采用传统的三维片上网络设计中成本驱动的设计和性能驱动的设计,和采用GNet的设计来实现该处理器。对3种设计进行仿真,对比其吞吐率、时延、功耗及成本,证明GNet不仅仅在成本上有突出的优势,在性能上也优于传统的三维设计。 In the three-dimensional integration technology, it is effective to reduce the cost of manufacturing well-tested and known qualified chips in different three-dimensional chip designs. A universal network (GNet) based on GNSD was designed and a 64-core processor was used as the experimental object. The cost-driven design and performance of the traditional three-dimensional chip-on-network design Driven design, and designed with GNet to implement the processor. Simulating the three designs and comparing their throughput, latency, power consumption and cost prove that GNet not only has outstanding advantages in cost but also outperforms the traditional three-dimensional design in performance.
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