论文部分内容阅读
数字系统设计要求考虑使用多个核心电压。存储器工作在1.8V,I2C和FPGA器件的工作电压为3.3V,微控制器工作在5V,而电荷耦合器件图像传感器则需要-9V~8V的工作电压。每种器件的时钟必须适应于其工作电压。可以用下图中的电平转换电路,将输入时钟信号调整到适当的逻辑高和逻辑低电平,包括负电压。这种特性对于需要负电压的器件很方便,如电荷耦合器件传感
Digital system design requirements consider the use of multiple core voltages. The memory operates at 1.8V, the operating voltage of I2C and FPGA devices is 3.3V, the microcontroller operates at 5V, and the charge-coupled device image sensor requires an operating voltage of -9V ~ 8V. The clock for each device must be adapted to its operating voltage. The input clock signal can be adjusted to the appropriate logic high and logic low, including the negative voltage, using the level shifter circuit in the figure below. This feature is convenient for devices that require a negative voltage, such as charge-coupled device sensing