针对椭圆曲线密码算法复杂、计算开销大、运算强度高和数据量大的特点,提出一种ECC算法硬件实现阵列处理结构,设计了有限域GP(2m)上的核心运算(模乘和模除运算)模块,实现了核心算法到计算结构的空间映射。设计原型在Xilinx公司Virtex-E系列FPGA器件上实现并进行验证。实验结果表明,该结构可获得较高的并行处理能力和计算效率,时钟频率和运算速度显著提高,在100 MHz时钟频率下,点乘运算速度达到平均90多次/秒。 Aiming at the characteristics of elliptic curve cryptography, such as complex computation, large computational cost, high computational intensity and large amount of data, an ECC algorithm based on hardware is proposed to realize the array processing structure. The core arithmetic of finite field GP (2m) Computing) module, to achieve the core algorithm to calculate the structure of space mapping. The prototype is implemented and validated on Xilinx Virtex-E family of FPGA devices. The experimental results show that this structure can achieve high parallel processing power and computational efficiency, and significantly improve the clock frequency and operation speed. The multiply operation speed achieves an average of 90 times / second at a clock frequency of 100 MHz.