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该文探讨了一种新的嵌入式系统设计方法,该方法基于Eclipse的JET(Java Emitter Templates)技术.设计者用XML(eXtensible Markup Language)语言对嵌入式系统蓝图模型进行描述,并编写系统对应的模板文件,JET将自动生成与该系统对应的硬件描述语言VHDL(Very high speed integrated hardware description language)的源代码,从而方便地在FPGA(FieldPro-grammableGateArray)芯片上实现系统.该方法属于高抽象级设计方法,具有高效、灵活和实用的特点.该文描述了利用此方法设计一个简单二级流水线CPU的完整过程,此方法的可行性通过仿真和实验得到了验证.“,”A new method of embedded system design is discussed,The method is based on JET (Java Emitter Templates)technology of Eclipse. Designers should describe the blueprint for the model of embedded systems using XML (eXtensible Markup Language) and prepare the corresponding template files before VHDL (Very high speed integrated hardware description language) source code is generated automatically by JET, thus designers will complete the system design and implementation on FPGA chip easily. This method is a high abstraction-level design approach with efficient, flexible and practical features. With the description on the design flow of a simple Pipeline CPU model, we will elaborate the feasibility and correctness of the method, which we had verified by simulation and experiment.