为验证以μP为基础的系统时钟信号是否合格,可对图中所示的1比特电路编程。另外,使用n个把输出并联到公共上拉电阻(R_1)的此种电路,可完成n位并行字的高速数据识别电路。当然,软件可以指导一μP来完成此任务,但硬件方法更快。首先,μP系统写位D_0和D_1到锁存器IC_1而设置所需的限制条件(高,低,无关或绝不允 To verify that the μP-based system clock signal is qualified, the 1-bit circuit shown in the figure can be programmed. In addition, using n such circuits that connect outputs in parallel to a common pull-up resistor (R_1), a high-speed data identification circuit capable of n-bit parallel words can be implemented. Of course, the software can guide a μP to accomplish this task, but the hardware method is faster. First, the μP system sets the required constraints (high, low, irrelevant or never allowed) by writing bits D_0 and D_1 to latch IC_1