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提出了一种基于0.35μm CMOS工艺的、具有p~+/n阱二极管结构的雪崩光电二极管(APD),器件引入了p阱保护环结构。采用silvaco软件对CMOS-APD器件的关键性能指标进行了仿真分析。仿真结果表明:p阱保护环的应用,明显降低了击穿电压下pn结边缘电场强度,避免了器件的提前击穿。CMOS APD器件的击穿电压为9.2V,工作电压下响应率为0.65A/W,最大内部量子效率达到90%以上,响应速度能够达到6.3GHz,在400~900nm波长范围内,能够得到很大的响应度。
An avalanche photodiode (APD) with a p ~ + / n-well diode structure based on a 0.35μm CMOS process is proposed. The device incorporates a p-well guard ring structure. Silvaco software was used to simulate the key performance indicators of CMOS-APD devices. The simulation results show that the application of p-well protection ring significantly reduces the electric field strength at the edge of the pn junction under the breakdown voltage and avoids premature breakdown of the device. The breakdown voltage of the CMOS APD device is 9.2V, the response rate under operating voltage is 0.65A / W, the maximum internal quantum efficiency reaches more than 90%, the response speed can reach 6.3GHz and can be very large in the wavelength range of 400-900nm Responsiveness.