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高速频率捕获装置利用一个可变速率的时钟电路来确定频率比较器的响应时间,该比较器将所需要的信号频率和参考频率进行比较,时钟电路的速率由两个信号频率之差的倒数决定。
The high speed frequency capture device uses a variable rate clock circuit to determine the response time of the frequency comparator which compares the desired signal frequency to a reference frequency and the rate of the clock circuit is determined by the reciprocal of the difference between the two signal frequencies .