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并行系统中计算结点之间的互联网络IN（InterconnectionNetwork）一直是并行体系结构的研究热点．30年来曾研究过多种IN的结构及其特性，然而这些IN都是以逻辑电路为基础的．本文提出一种以多端口快速静态存储器（MPFSRAM）为中心的并行系统互联机制，称之为MCIM．MCIM不同于共享数据的共享存储器，它的容量较小，划分为多个消息传递的通信邮区，并通过每个端口的访问接口（PAI），连接8—16个计算结点．常用的四端口存储器可组成32-64个计算结点的并行系统，构成当前国际流行的“超结点”．MCIM并行系统可充分利用MPFS－RAM的频宽，使消息传递的数据传输率达到10GbpS以上；可使数据发送和接收按流水线方式进行，从而减少消息传递的延迟．本文描述了MCIM的原理、PAI的仲裁和选择作用以及以存储器为中心的体系结构的实现物理布局．本文还描述了MCIM并行系统的仿真工作，并给出了实验结果．
Interconnection Network (IN) between computing nodes in parallel system has been a hot topic in parallel architecture. Over the past 30 years have studied a variety of IN structure and characteristics, however, these IN are based on the logic circuit. This paper presents a multi-port fast static memory (MPFSRAM) as the center of the parallel system interconnection mechanism, called MCIM. Unlike shared memory, which shares data, MCIM is smaller in capacity and is divided into messaging messaging zones for multiple messaging and connects 8-16 compute nodes through each port’s access interface (PAI). Commonly used four-port memory can form a parallel system of 32-64 computing nodes, constitute the current international popular “super junction.” MCIM parallel system can take full advantage of MPFS-RAM bandwidth, so that the data transfer rate of more than 10GbpS messaging; can send and receive data in a pipeline manner, thereby reducing the delay of messaging. This article describes the principles of MCIM, the arbitration and selection of PAIs, and the physical layout of memory-centric architectures. This paper also describes the simulation of MCIM parallel system, and gives the experimental results.