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This paper presents a design for a low-power,high-resolution audio Σ△ analog-to-digital converter(ADC)based on a novel gain-boost class-C inverter.The gain-boost class-C inverter behaves as a sub-threshold amplifier,thereby minimizing power dissipation.The proposed ADC chip is fabricated in a SMIC 65-nm CMOS process with a die area of 0.63 mm2.With 1.2 V of supply voltage,the ADC chip achieves a peak signal-tonoise-plus-distortion-ratio(SNDR)of 92 dB and a dynamic range(DR)of 97 dB over the 20 kHz audio band,consuming only 1.13 mW.These results make the ADC particularly suitable for portable electronics applications.
This paper presents a design for a low-power, high-resolution audio Σ Δ analog-to-digital converter (ADC) based on a novel gain-boost class-C inverter.The gain-boost class-C inverter behaves as a sub -threshold amplifier, thereby minimizing power dissipation. The proposed ADC chip is fabricated in a SMIC 65-nm CMOS process with a die area of 0.63 mm2.With 1.2 V of supply voltage, the ADC chip achieves a peak signal- tonoise-plus- distortion-ratio (SNDR) of 92 dB and a dynamic range (DR) of 97 dB over the 20 kHz audio band, only only 1.13 mW. These results make the ADC particularly suitable for portable electronics applications.