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将半导体制造中常规的等离子增强化学气相淀积(PECVD)SiO_2工艺和等离子反应离子刻蚀(RIE)SiO_2工艺结合起来,利用三步填充法实现亚微米间距的金属间介质填充制作。此方法有效解决了常规微米级等离子增强化学气相淀积工艺填充亚微米金属条间隙的空洞问题。实验结果表明,在尺寸大于0.5μm的金属条间隙中没有发现介质填充的空洞问题。空洞问题的解决,使得“三步填充法”的介质填充技术在工艺中能够实用化,并应用到亚微米多层金属布线工艺当中。
The conventional plasma enhanced chemical vapor deposition (PECVD) process and the plasma reactive ion etching (RIE) process are combined in semiconductor manufacturing to fill the submicrometer interfacial interfacial filling with three-step filling method. The method effectively solves the problem of cavities filled with submicron metal strips in a conventional micron-scale plasma enhanced chemical vapor deposition process. The experimental results show that there is no problem of cavities filled by the medium in the gaps between the metal strips larger than 0.5 μm in size. The solution of the hollow problem makes the “three-step filling method” of the media filling technology in the process can be practical, and applied to sub-micron multi-layer metal wiring process.