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分析了单片数控衰减器的衰减原理,设计了一款DC～2 GHz的大衰减量的6 bit数控衰减器。并通过数模混合设计,采用基于GaAs工艺的场效应管驱动器结构将正TTL电平转换为衰减器负的控制电平,成功实现了正电控制,对单片电路进行了仿真与优化,采用GaAs工艺技术完成了流片。测试结果表明,在DC～2 GHz频带内,衰减步进1 dB,最大衰减量63 dB,插入损耗小于1.7 dB,衰减精度小于±0.1 dB@1 dB～4 dB;小于±0.8 dB@8 dB～32 dB;小于±1.3 dB@48 dB～63 dB,两个端口在所有态下的驻波比小于1.2∶1。单片数控衰减器芯片尺寸为3.0 mm×2.0 mm,控制电压为0和5 V。
The attenuation principle of single chip digital attenuator is analyzed. A 6 bit digital attenuator with large attenuation of DC ~ 2 GHz is designed. Through the mixed-mode design, the positive TTL level is converted to the negative control level of the attenuator by using the GaAs-based FET driver structure, the positive control is successfully achieved, and the monolithic circuit is simulated and optimized. GaAs process technology to complete the film. The test results show that in DC ~ 2 GHz, the attenuation step is 1 dB, the maximum attenuation is 63 dB, the insertion loss is less than 1.7 dB, the attenuation accuracy is less than ± 0.1 dB @ 1 dB ~ 4 dB, and less than ± 0.8 dB @ 8 dB ~ 32 dB; less than ± 1.3 dB @ 48 dB ~ 63 dB, the VSWR of both ports is less than 1.2: 1 in all modes. The monolithic digital attenuator chip size is 3.0 mm × 2.0 mm with control voltages of 0 and 5 V.