A new planar split dual gate (PSDG) MOSFET device, its characteristics and ex-perimental results, as well as the three dimensional device simulations, are re- ported here for the first time. Both theoretical calculation and 3D simulation, as well as the experiment data, show that the two independent split dual gates can provide dynamical control of the device characteristics, such as threshold voltage (Vt) and sub-threshold swing (SS), as well as the device saturated current. The PSDG MOSFET transistor leakage current (Ioff) can be reduced as much as 78% of the traditional single gate MOSFET. The PSDG is fabricated and fully compatible with our conventional 0.18 μm logic process flow. A new planar split dual gate (PSDG) MOSFET device, its characteristics and ex-perimental results, as well as the three dimensional device simulations, are re- ported here for the first time. Both theoretical calculation and 3D simulation, as well as the experiment data, show that the two independent split dual gates can provide dynamical control of the device characteristics, such as threshold voltage (Vt) and sub-threshold swing (SS), as well as the device saturated current. (Ioff) can be reduced as much as 78% of the traditional single gate MOSFET. The PSDG is fabricated and compatible with our conventional 0.18 μm logic process flow.