论文部分内容阅读
在分析当前数字专用集成芯片前端验证问题的基础上,提出了一种基于SystemC软件建模的专用集成芯片RTL级验证方法,并应用到对网络调度处理芯片的具体验证实验中。实验数据表明:由于采用软件模型和软件控制技术,该方案在缩短验证周期、提高验证可靠性、精确判定验证决策点以及有效集成各类验证环境等方面均明显优于传统RTL验证方案。
Based on the analysis of the front-end verification of digital ASICs, this paper proposes a RTL-level verification method based on SystemC software modeling, which is applied to the specific verification experiments of network scheduling processing chips. The experimental data show that the proposed scheme outperforms the traditional RTL scheme in shortening the verification cycle, improving the verification reliability, accurately determining the verification decision points and effectively integrating various verification environments due to the software model and software control technology.