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本文介绍了用于硅栅CMOSIC园片级工艺诊断和可靠性监控的微电子测试图形。重点论述了(1)用于检测漏、源及多晶硅薄层电阻和因扩散及腐蚀引起的横向变化量的组合结构,(2)用于监测CMOSIC动态参数的结构设计及其对工艺的评价。
This article describes the microelectronic test pattern for silicon gate CMOSIC wafer level process diagnostics and reliability monitoring. (1) The composite structure for detecting the sheet resistance of drain, source and polysilicon and the lateral variation due to diffusion and corrosion; (2) The structural design for monitoring the dynamic parameters of CMOSIC and its evaluation of the process.