基于增量型Σ-Δ调制器理论,利用Matlab的Simulink仿真工具,建立了考虑非理想因素的3阶前馈式增量型Σ-Δ调制器系统模型,并进行了仿真。仿真结果显示,信号噪声比达到98.2dB,有效输出位达到16.02位。引入消除失调电压的技术后,基于宏力半导体0.18μm标准CMOS工艺,对3阶前馈式增量型Σ-Δ调制器进行电路和版图设计,Spice后仿真结果显示,信号噪声比达到92.79dB,有效输出位达到15.12位。 Based on the incremental sigma-delta modulator theory, a 3-order feedforward incremental sigma-delta modulator system model considering non-ideal factors was established and simulated by Simulink simulation tool of Matlab. Simulation results show that the signal to noise ratio reaches 98.2dB and the effective output bit reaches 16.02 bits. After introducing the technology of eliminating the offset voltage, the circuit and layout design of the 3-order feed-forward incremental sigma-delta modulator is carried out based on Grace CMOS 0.18μm standard CMOS technology. The post-Spice simulation shows that the signal-to-noise ratio reaches 92.79dB , The effective output bit reaches 15.12 bits.