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提出了一种基于BiCMOS工艺的高速高精度时钟控制比较器.该比较器包含一级预放大器、动态锁存器及时钟控制反相器.预放大器采用正反馈放大技术保证了增益和速度,锁存器采用两个正反馈锁存器和额外的反馈环路提高了锁存的速度.基于3.3V0.35μmBiCMOS工艺进行了设计和仿真,结果表明该比较器可以应用于160MS/s高精度流水线模数转换器.
A high-speed and high-precision clock controlled comparator based on BiCMOS process is proposed. The comparator includes a first stage preamplifier, a dynamic latch and a clock controlled inverter. The preamplifier uses positive feedback amplification to ensure gain and speed. The latch-up speed is improved by using two positive feedback latches and an additional feedback loop.Based on the 3.3V0.35μm BiCMOS process, the design and simulation results show that the comparator can be applied to 160MS / s high-precision pipeline mode Digital converter.