论文部分内容阅读
数字信号处理(DSP)形式的数字锁相环路(DPLL)以典型的二进制数字乘法、加法等运算实现模拟PLL等效的作用。用作FM解调器DPS形式的DPLL能与各种模拟FM解调器相比较,具有大规模集成化、小型化、不用调整以及高稳定性等优点。本论文叙述有关DSP形式的DPLL—FM解调器的失真特性。首先,弄清了二阶DPLL作为对象的环路参数和传递函数的关系。其次,在输入FM信号利用单一正弦波调制且载波频率和数字VCO的自由振荡频率存在一定失谐的情况下,利用Klapper方法,通过解析途径给出失真率和输入FM信号的最大频率偏移、调制频率、失谐频率、采样频率与DPLL环路参数之间的关系。最后,根据计算机仿真表明:在最大频率偏移和采样频率之比很小的区域中,理论值与仿真位非常一致。此外,阐明了由相位比较采用的乘法所产生的高频成分对环路和失真率的影响。
Digital Phase-Locked Loop (DPLL) in the form of digital signal processing (DSP) implements the analog PLL equivalent effect with typical binary digital multiply, add, etc. operations. DPLL used as FM demodulator DPS form can compare with all sorts of analog FM demodulators, have the advantages of large-scale integration, miniaturization, unadjustment and high stability. This paper describes the distortion characteristics of the DPLL-FM demodulator in DSP form. First of all, the relationship between loop parameters and transfer functions of second-order DPLLs is clarified. Secondly, when the input FM signal is modulated by a single sine wave and the free-running frequency of the carrier frequency and the digital VCO is mismatched, the maximum frequency offset of the distortion and the input FM signal is given by the Klapper method. Modulation frequency, detuning frequency, sampling frequency and DPLL loop parameters. Finally, according to the computer simulation, it is shown that the theoretical value is in good agreement with the simulation bit in the area where the ratio of the maximum frequency offset to the sampling frequency is very small. In addition, the influence of the high frequency components generated by the multiplication applied to the phases on the loop and the distortion rate is clarified.