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基于级联半导体光放大器(SOA)实现全光逻辑与门的方案中,第一级输出信号质量直接影响逻辑与运算结果.采用载流子恢复较慢的体材料半导体光放大器用于第一级转换,在10 Gbit/s以上得不到理想的转换结果,限制了该方案实现逻辑与门的速率.利用光纤延时干涉仪(DI)和第一级半导体光放大器级联可以改善第一级输出信号质量,从而有效提高第二级全光逻辑与门的实现速率.阐述了改进方案中延时干涉仪的作用,并进行了数值模拟.根据实验结果,采用载流子恢复较慢的半导体光放大器级联延时干涉仪能够实现高速归零(RZ)信号和非归零(NRZ)信号的反码,从而得到较高速率的全光逻辑与门.实验实现了20 Gbit/s的伪随机归零和非归零信号的全光逻辑与门,对40 Gbit/s的结果进行了分析和讨论.
Based on cascaded semiconductor optical amplifier (SOA) to achieve all-optical logic AND gate scheme, the output signal quality of the first stage directly affects the logic and operation results. The use of bulk carrier semiconductor optical amplifier slow recovery for the first stage Conversion, the ideal conversion result can not be obtained above 10 Gbit / s, which limits the logic-to-gate rate of this scheme.Combining the optical fiber delay interferometer (DI) with the first-stage semiconductor optical amplifier can improve the efficiency of the first stage Output signal quality, so as to effectively improve the realization rate of the second stage all-optical logic AND gate.The function of the delay interferometer in the improved scheme is described and the numerical simulation is carried out.According to the experimental results, the semiconductor with slower charge carrier recovery The optical amplifier cascaded delay interferometer can achieve high-speed all-optical logic AND gate by implementing the inverse of the high-speed zero (RZ) signal and the non-return-to-zero (NRZ) signal. The results of 40 Gbit / s are analyzed and discussed with the all-optical logic AND gate of random zero-return and non-return-to-zero signals.