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发展同步数字系列 ( SDH)技术必须依赖专用集成电路。 MXL O2 1E1- 3是清华大学电子工程系自主研制和开发的大规模数字 SDH专用集成电路系列中的一片 ,它能同时完成 2 1个基群 E1到虚容器 VC4的映射及去映射 ,可由单片机进行配置与监控 ,全部电路都实现数字化 ,外围电路简单 ,应用方便。芯片中的关键技术是基群 E1解同步器的设计 ,MXL O2 1E1- 3采用了全数字化的统计预测法。介绍了该方法的原理并从理论上分析了它在抑制 E1输出抖动和漂移方面的性能。芯片的实际测量结果表明芯片的各项功能及性能指标都达到或超过设计目标。
Development of synchronous digital hierarchy (SDH) technology must rely on ASICs. MXL O2 1E1-3 is one of a large-scale digital SDH ASIC series independently developed by Department of Electronic Engineering of Tsinghua University. It can accomplish mapping and de-mapping of 21 elementary groups E1 to VC4 at the same time. Configuration and monitoring, all the circuits are digital, the external circuit is simple, easy to use. The key technology in the chip is the design of the group E1 de-synchronizer. The MXL O2 1E1-3 adopts the all-digital statistical prediction method. The principle of this method is introduced and its performance in suppressing jitter and wander of E1 output is theoretically analyzed. The actual measurement results show that the chip’s various functions and performance indicators meet or exceed the design goals.