It is well known that MOSFET on SiGe-on-insulator(SGOI)substrate has advantages of high carrier mobility and suppression of parasitic capacitance and leakage current.Since the quality of SGOI substrate dominates the MOSFET performance,the electrical characterization of SGOI is important.In this presentation,we show the characterization for SGOI substrates fabricated using Ge condensation by dry oxidation [1].Using a starting substrate with 10 nm cap-Si/62 ru,Si0.78Ge0.22/70 nm Si/140 nm BOX/Si substrate,we fabricated three kinds of samples with different Ge fractions(Ge%): 27.5 nm Si045Ge0.55,20.5 nm Si0.25Ge0.75,and 12.5 nm Ge.From TEM observation,no defect was observed for SGOI with Ge%of 55%,but stacking faults(SFs)and microtwin originating from strain relaxation generated in Si0.25Ge0.75 and GOI layer.By back-gate MOSFET measurement,bottom-channel hole mobility(μ0)was also measured.The enhancement ofμ0 for SGOI/GOI was clearly observed with an increase in Ge%.High μ0 of 440 cm2/V-s in GOI layer was achieved despite defect existence,which is 2.2 times higher than that of Si [2-3].We also present theμ0 enhancement by the compressive stain [4].Since the concentration of unintentionally induced acceptor(NA)was in the order of 1018cm-3,it should not originate from impurities.A reasonable origination is SF generated by the lattice relaxation during the Ge condensation.We also attempted to passivate this kind of defect by forming gas annealing(FGA)with hydrogen and Al post-deposition annealing(PDA).Both Al-PDA and FGA were effective for the samples with low Ge%of 20%.For the samples with Ge%≥ 50%,Al-PDA could effectively suppress NA by approximately two orders [5].