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介绍了制备InSb红外探测器列阵所需要的半导体工艺。业已成功地制备了高质量的MOS(金属—氧化物—半导体)、MOSFET(金属—氧化物—半导体场效应晶体管)以及线列和二维CID(电荷注入器件)列阵器件。确定了MOS电容的界面态密度小于5×10~(10)厘米~(-2)·电子伏~(-1)。这些结果意味着能够制备自扫描单块列阵。借助探测率(D~*)和响应率(R)对线列和二维CID列阵的性能进行了评价。测出了一个64元的线列的平均D~*为3.4×10~(11)厘米·赫~(1/2)·瓦~(-1),这个值相当于背景限D~*值的70%。R为1×10~(-5)伏/光子,其均匀性为10%。也得到了32×32元列阵的D~*和R值。
The semiconductor process required to fabricate an InSb infrared detector array is presented. High-quality MOS (Metal-Oxide-Semiconductor), MOSFET (Metal-Oxide- Semiconductor Field Effect Transistor) and line and two-dimensional CID (Charge Injected Device) array devices have been successfully fabricated. It is confirmed that the interface state density of MOS capacitor is less than 5 × 10 ~ (10) cm -2 · eV -1. These results mean that self-scanning monolithic arrays can be prepared. The performance of linear array and two-dimensional CID array was evaluated with the detection rate (D ~ *) and response rate (R). The average D ~ * of a 64-element line array was found to be 3.4 × 10 ~ (11) cm · Hz ~ (1/2) · W -1. This value corresponds to the background D * value 70%. R is 1 × 10 -5 V / photon, the uniformity is 10%. Also got 32 × 32 yuan array D ~ * and R value.